Garrou / Bower / Ramm Handbook of 3D Integration

Technology and Applications of 3D Integrated Circuits
1. Auflage 2011
ISBN: 978-3-527-62306-8
Verlag: Wiley-VCH
Format: PDF
Kopierschutz: Adobe DRM (»Systemvoraussetzungen)

E-Book, Englisch, 772 Seiten, E-Book

Beiträge von Forschern und Strategen an Universitäten und aus der Industrie diskutieren hier die physikalischen Grenzen der klassischen 2D-Elektronik und beleuchten die Erfordernisse des Marktes sowie Ansatzpunkte für zukünftige Entwicklungen.

Autoren/Hrsg.

Garrou, Philip

Bower, Christopher

Ramm, Peter

Inhaltsverzeichnis

1 Introduction to 3D Integration
2 Drivers for 3D Integration
3 Overview of 3D Process Technology
 
Part I - Through Silicon Via Fabrication
4 Deep Reactive Ion Etching
5 Laser Ablation
6 Insulation - SiO2
7 Insulation - Organic Dielectrics
8 Copper Plating
9 Metallization by chemical vapor deposition of W and Cu
 
Part II - Wafer Thinning and Bonding Technology
10 Fabrication, Processing and Singulation of Thin Wafers
11 Overview of Bonding Technologies for 3D Integration
12 Chip-to-Wafer and Wafer-to-Wafer Integration Schemes
13 Polymer Adhesive Bonding Technology
14 Bonding with Intermetallic Compounds
 
Part III - Integration Processes
15 Commercial Activity
16 Fraunhofer IZM
17 Interconnect Process at the University of Arkansas
18 Vertical Interconnection by ASET at Toshiba
19 3D Integration at CEA-LETI
20 Lincoln Laboratory's Integration Technology
21 3D Integration Technologies at IMEC
22 Fabrication Using Copper Thermo-Compression Bonding at MIT
23 Rensselaer 3D Integration Processes
24 3D Integration at Tezzaron Semiconductor Corporation
25 3D Integration at Ziptronix, Inc.
26 3D Integration at ZyCube Sendai Lab.
 
Part IV - Design, Performance, and Thermal Management
27 Design for 3D Integration at NC State University
28 Design for 3D Integration at Fraunhofer IIS-EAS
29 Multiproject Circuit Design and Layout in Lincoln Laboratory's 3D Technology
30 Computer-aided Design for 3D Circuits at the University of Minnesota
31 Electrical Performance of 3D Circuits
32 Testing of 3D Circuits
33 Thermal Management of Vertically Integrated Packages at IBM Zurich
 
Part V - Applications
34 3D and Microprocessors
35 3D Memories
36 Sensor Arrays
37 Power Devices
38 Wireless Sensor Systems - The e-CUBES Project
 
39 Conclusions

1 Introduction to 3D Integration
2 Drivers for 3D Integration
3 Overview of 3D Process Technology
 
Part I - Through Silicon Via Fabrication
4 Deep Reactive Ion Etching
5 Laser Ablation
6 Insulation - SiO2
7 Insulation - Organic Dielectrics
8 Copper Plating
9 Metallization by chemical vapor deposition of W and Cu
 
Part II - Wafer Thinning and Bonding Technology
10 Fabrication, Processing and Singulation of Thin Wafers
11 Overview of Bonding Technologies for 3D Integration
12 Chip-to-Wafer and Wafer-to-Wafer Integration Schemes
13 Polymer Adhesive Bonding Technology
14 Bonding with Intermetallic Compounds
 
Part III - Integration Processes
15 Commercial Activity
16 Fraunhofer IZM
17 Interconnect Process at the University of Arkansas
18 Vertical Interconnection by ASET at Toshiba
19 3D Integration at CEA-LETI
20 Lincoln Laboratory's Integration Technology
21 3D Integration Technologies at IMEC
22 Fabrication Using Copper Thermo-Compression Bonding at MIT
23 Rensselaer 3D Integration Processes
24 3D Integration at Tezzaron Semiconductor Corporation
25 3D Integration at Ziptronix, Inc.
26 3D Integration at ZyCube Sendai Lab.
 
Part IV - Design, Performance, and Thermal Management
27 Design for 3D Integration at NC State University
28 Design for 3D Integration at Fraunhofer IIS-EAS
29 Multiproject Circuit Design and Layout in Lincoln Laboratory's 3D Technology
30 Computer-aided Design for 3D Circuits at the University of Minnesota
31 Electrical Performance of 3D Circuits
32 Testing of 3D Circuits
33 Thermal Management of Vertically Integrated Packages at IBM Zurich
 
Part V - Applications
34 3D and Microprocessors
35 3D Memories
36 Sensor Arrays
37 Power Devices
38 Wireless Sensor Systems - The e-CUBES Project
 
39 Conclusions

Über Autor(innen)

Dr. Philip Garrou is a consultant in the field of thin film microelectronic materials and applications, prior to which he was Director of Technology and New Business Development for Dow Chemicals' Advanced Electronic Materials business. He has authored two microelectronics texts and is co-author of over 75 peer reviewed publications and book chapters.
 
Dr. Christopher A. Bower is Senior Research Scientist at Semprius Inc., Durham, NC, where he works on the heterogeneous integration of compound semiconductors with silicon integrated cirucits. He previously held positions at Inplane Photonics as a senior process development engineer and as a scientist at RTI International, where he served as the technical lead on multiple DARPA-funded 3D integration programs. Dr. Bower has authored or co-authored over 40 peer-reviewed publications and holds 2 U.S. patents.
 

Dr. Peter Ramm is head of the silicon technology department of the Fraunhofer Institute for Reliability and Microintegration (IZM) in Munich, Germany, where he is responsible for process integration of innovative devices and new materials. He received his Ph.D. in physics from the University of Regensburg and subsequently worked for Siemens before joining the Fraunhofer Institute for Solid State Technology (IFT) in Munich in 1988. He is the author or co-author of more than 50 papers and 20 patents.