Hohenauer / Leupers C Compilers for ASIPs

Automatic Compiler Generation with LISA
1. Auflage 2009
ISBN: 978-1-4419-1176-6
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 223 Seiten

This book presents a novel approach for Architecture Description Language (ADL)-based instruction-set description that enables the automatic retargeting of the complete software toolkit from a single ADL processor model.

Autoren/Hrsg.

Hohenauer, Manuel

Leupers, Rainer

Inhaltsverzeichnis

1;Acknowledgements;6
2;Contents;8
3;List of Figures;12
4;List of Tables;14
5;1 Introduction ;15
5.1; Motivation;15
5.2; Outline of the Book;19
6;2 ASIP Design Methodology;20
6.1; ASIP Design Phases;20
6.2; Compiler-in-the-Loop Architecture Exploration;22
6.3; Design Methodologies;23
6.4; Synopsis;26
7;3 A Short Introduction to Compilers;27
7.1; General Overview;27
7.2; Compiler Frontend;27
7.3; Compiler Backend;29
7.3.1; Data- and Control-Flow Graphs;29
7.3.2; Code Selection;33
7.3.3; Register Allocation;35
7.3.4; Instruction Scheduling;38
7.3.5; Code Emitter;40
7.4; Retargetable Compilers;41
7.5; Synopsis;43
8;4 Related Work ;44
8.1; Instruction-Set-Centric ADLs;44
8.2; Architecture-Centric ADLs;47
8.3; Mixed-Level ADLs;48
8.4; Other Related Approaches;50
8.5; Synopsis;54
9;5 Processor Designer ;55
9.1; Design Space Exploration;55
9.1.1; Software Tool Generation;55
9.1.2; Architecture Implementation;57
9.1.3; System Integration;57
9.2; The LISA Language;58
9.3; Compiler Designer;61
9.4; Synopsis;65
10;6 Code Selector Description Generation ;66
10.1; The Semantic Gap;67
10.2; SEMANTICS Section;68
10.2.1; Semantics Statements;68
10.2.2; Semantics Resources;69
10.2.3; Micro-Operations;70
10.2.4; Bit-Width Specification;72
10.2.5; Micro-Operator Chaining;73
10.2.6; Execution Timing;73
10.2.7; IF--ELSE Statements;74
10.2.8; Semantics Hierarchy;75
10.3; Code Selector Description Generation;77
10.3.1; Nonterminal Generation;78
10.3.2; Mapping Rule Generation;81
10.4; Compiler Designer Integration;91
10.5; Synopsis;92
11;7 Results for SEMANTICS-Based Compiler Generation;93
11.1; Case Studies;93
11.2; Mapping Rule Generation;94
11.3; Compiler Evaluation;95
11.3.1; PP32;96
11.3.2; ST220;98
11.3.3; MIPS;99
11.4; Conclusions;100
12;8 SIMD Optimization ;102
12.1; Related Work;104
12.2; SIMD Framework;105
12.2.1; Basic Design Decisions;106
12.2.2; Terminology;107
12.2.3; Alignment Analysis;107
12.2.4; SIMD Analysis;110
12.2.5; Strip Mining and Loop Peeling;111
12.2.6; Scalar Expansion;113
12.2.7; The Vectorizer;114
12.2.8; Loop Unrolling;115
12.2.9; The Unroll-and-Pack-Based SIMDfyer;115
12.2.10; Code Example;116
12.3; Retargeting the SIMD Framework;119
12.3.1; SIMD-Candidate Matcher;119
12.3.2; SIMD-Set Constructor;122
12.4; Experimental Results;125
12.4.1; Alignment Analysis;125
12.4.2; SIMD Optimizations;128
12.5; Conclusions;133
13;9 Predicated Execution ;134
13.1; Code Example;134
13.2; Related Work;136
13.3; Optimization Algorithm;137
13.3.1; Implementation Schemes;137
13.3.2; Probability Information;140
13.3.3; Cost Computation;143
13.3.4; Selecting the Best Scheme;147
13.3.5; Splitting Mechanism;148
13.4; Retargeting Formalism;149
13.5; Code Generation Flow;152
13.6; Experimental Results;153
13.7; Conclusions;156
14;10 Assembler Optimizer ;158
14.1; Related Work;159
14.2; Application Programmer Interface;159
14.3; Scheduler;160
14.4; Peephole Optimizer;161
14.4.1; Replacement Library;161
14.5; Experimental Results;164
14.6; Conclusions;166
15;11 Summary;167
16;A Semantics Section ;170
16.1; Semantics Statements;170
16.1.1; IF-ELSE Statements;171
16.1.2; Nonassignment Statements;173
16.1.3; Execution Timing;174
16.2; Micro-Operators;174
16.2.1; Notations;175
16.2.2; Group of Arithmetic Operators;176
16.2.3; Group of Logic Operators;182
16.2.4; Group of Shifting Operators;184
16.2.5; Group of Zero/Sign Extension Operators;189
16.2.6; Others/Intrinsic Operators;191
16.2.7; Affected Flag Declarations;193
16.3; SEMANTICS Section Grammar;194
16.3.1; Grammar Notation;194
16.3.2; SEMANTICS Grammar;194
17;B CoSy Compiler Library Grammar ;199
17.1; Grammar Notation;199
17.2; Global Structure;200
17.3; Basic Rules;200
17.3.1; CoSy IR;200
17.3.2; Rule Condition;201
17.3.3; CoSy Condition;201
17.3.4; Nonterminal Constraint;202
17.3.5; Control Clause;202
17.3.6; Read/Write Clause;202
17.3.7; Scratch Registers;203
17.3.8; Semantics Pattern;203
17.3.9; Node Assignment;203
17.3.10; Result Clause;203
17.4; Semantics Transformations;203
17.5; Compiler Semantics;204
17.5.1; Assignment Statement;204
17.5.2; Label Statement;204
17.5.3; IF-ELSE Statement;204
17.5.4; Non-assignment Statement;205
17.5.5; Micro-operation;205
17.5.6; Operands;206
17.6; Miscellaneous;206
18;References;208
19;Index;221