Holleman / Zhang / Otis Ultra Low-Power Integrated Circuit Design for Wireless Neural Interfaces

1. Auflage 2010
ISBN: 978-1-4419-6727-5
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 121 Seiten, eBook

This book will describe ultra low-power, integrated circuits and systems designed for the emerging field of neural signal recording and processing, and wireless communication. Since neural interfaces are typically implanted, their operation is highly energy-constrained. This book introduces concepts and theory that allow circuit operation approaching the fundamental limits. Design examples and measurements of real systems are provided. The book will describe circuit designs for all of the critical components of a neural recording system, including:
Amplifiers which utilize new techniques to improve the trade-off between good noise performance and low power consumption.
Analog and mixed-signal circuits which implement signal processing tasks specific to the neural recording application:

Detection of neural spikes Extraction of features that describe the spikes
Clustering, a machine learning technique for sorting spikes Weak-inversion operation of analog-domain transistors, allowing processing circuits that reduce the requirements for analog-digital conversion and allow low system-level power consumption. Highly-integrated, sub-mW wireless transmitter designed for the Medical Implant Communications Service (MICS) and ISM bands.

Zielgruppe

Research

Autoren/Hrsg.

Holleman, Jeremy

Zhang, Fan

Otis, Brian

Inhaltsverzeichnis

1;Contents;5
2;Introduction;8
3;Bio-Signal Interface Amplifiers: An Introduction;15
3.1;Characteristics of the Recording Electrodes;15
3.2;Characteristics of Bio-Signals;17
3.2.1;Brain Recordings;17
3.2.2;Muscle-Based Signals;18
3.3;Noise/Power Tradeoff;18
3.3.1;Flicker Noise, 1/f Noise;18
3.3.2;Thermal Noise;19
3.4;Representative Prior Art;19
4;A Low-Power, Low-Noise, Open-Loop Amplifier for Neural Recording;21
4.1;Open-Loop Amplifier Design;21
4.2;Results;23
4.3;Effect of Non-Linearity on Neural Recordings;26
4.4;Conclusions;29
5;Closed-Loop Neural Recording Amplifier Design Techniques;31
5.1;Design of a Closed-Loop Telescopic Amplifier;31
5.1.1;Closed-Loop Architecture;31
5.1.2;Analysis of Pseudo-Resistors;32
5.1.3;Telescopic OTA Design Overview;33
5.1.4;Design Optimization;34
5.1.5;Stability and Common-Mode Feedback;35
5.2;Design of a Closed-Loop Complementary-Input Amplifier;36
5.2.1;Design of an Closed-Loop Fully-Differential Complementary-Input Amplifier;36
5.3;Design of a Variable-Gain Amplifier;39
6;Closed-Loop Bio-Signal Amplifiers: Experimental Results;42
6.1;Amplifier Testing;42
6.2;Variable Gain Amplifier (VGA) Testing;44
6.3;In-Vivo Testing;46
7;Design and Implementation of Chopper-Stabilized Amplifiers;50
7.1;Chopper-Stabilization Technique;50
7.1.1;Open-Loop Operation Principle;50
7.1.2;Closed-Loop Operation Principle;51
7.2;Design of a Chopper-Stabilized Amplifier;51
7.3;Hardware Implementation;53
7.3.1;Transfer Function;53
7.3.2;Amplifier Noise;54
8;Spike Detection and Characterization;55
8.1;The Spike Detection Task;55
8.2;Spike Detection Techniques;57
8.3;Analog and Mixed-Mode Computation;58
8.4;System Design;59
8.4.1;Spike Detector;60
8.4.2;Feature Extraction;61
8.4.3;Analog-Digital Converter;62
8.5;Results;63
9;Spike Sorting;68
9.1;Overview;68
9.2;K-Means Clustering Algorithm;70
9.3;Hardware Considerations for Analog On-Line Clustering;72
9.3.1;On-Line Median Learning;72
9.3.2;Non-Ideal Computational Elements;74
9.3.3;Asymmetric Updates;75
10;Analog Clustering Circuit;78
10.1;Floating-Gate Memories;78
10.2;Device Characterization;79
10.3;Circuit Design;82
10.3.1;Clustering Circuit;82
10.3.2;Floating-Gate Memory Cell;84
10.3.3;Decision Circuit;86
10.4;Experimental Results;88
10.4.1;Update Rates;88
10.4.2;Memory Cell Retention;90
10.4.3;Classification;91
10.4.4;Clustering Convergence;93
10.5;Discussion;96
11;NeuralWISP: A Wirelessly Powered Spike Density Recording System;100
11.1;Previous Neural Recording Systems;100
11.2;System Design;102
11.2.1;Analog Signal Path;103
11.2.2;Digital Control;106
11.3;Test Results;106
11.4;Experimental Results;110
11.5;Conclusions;111
12;A 500mW Wireles Neural Streaming System;114
12.1;Analog Front End;114
12.2;Conversion and Control;115
12.3;MICS-band Wireless Transmitter;116
12.4;Results;116
13;Conclusions;119
14;Index;121